progscrape: matse.illinois.edu

Monolithic 3D integration of silicon transistors: a scalable process for vertically stacking ultrathin (≤10 nm) single-crystalline silicon layers enables multi-tiers of complementary junctionless transistors to be sequentially fabricated on the same starting substrate at low temps with >98% yields

28 hours ago matse.illinois.edu 3d engineering transistor

A new way to build chips: Sequentially stacking silicon to extend Moore's Law

2 days ago matse.illinois.edu