Show HN: A luma dependent chroma compression algorithm (image compression)

Fundamental flaws of SIMD ISAs (2021)

MRISC32 – An Open 32-Bit RISC/Vector ISA (Suitable for FPGA CPU)

Debunking CISC vs. RISC code density

I want to show a thing (C++ code generation)

Three Fundamental Flaws of SIMD

MRISC32 conditional moves

Benchmarking OS primitives

Faster C++ builds

The MRISC32 – A vector first CPU design

Benchmarking OS primitives

A tidy, linear Git history