How AI on Microcontrollers Works: Operators and Kernels

Just barely fitting a full Wi-Fi stack on the nRF9151

Accessing the Qualcomm Modem over USB on the RAK5010

VPR: Nordic's First RISC-V Processor

This website is hosted on Bluesky

Is it better to fail spectacularly?

Wireframes Are Cheap, Engineering Should Be Too

Pacing: the most important skill in startup engineering leadership

Accessing the Pinecil UART with Picoprobe

Reflections on running 3k miles in 2023

Understanding every byte in a WASM module

A Brief Retrospective on SPARC Register Windows

A Single-Cycle 64-Bit RISC-V Register File

RISC-V Bytes: Exploring a Custom ESP32 Bootloader

How RISC-V Timer Interrupts Work

RISC-V Bytes

Opening a UDP Socket in RISC-V Assembly

The Missing Kubernetes Type System

Cross-Compiling Rust for RISC-V

Passing on the Stack in RISC-V

Caller and Callee Saved Registers

Chdir to cwd: permission denied

Understanding Non-Local Jumps (Setjmp/Longjmp) in RISC-V Assembly